Design Through Verilog HDL

A comprehensive resource on Verilog HDL for beginners and experts <p>Large and complicated digital circuits can be incorporated into hardware by using Verilog, a hardware description language (HDL). A designer aspiring to master this versatile language must first become familiar with its constructs, practice their use in real applications, and apply them in combinations in order to be successful. <i>Design Through Verilog HDL</i> affords novices the opportunity to perform all of these tasks, while also offering seasoned professionals a comprehensive resource on this dynamic tool.</p> <p>Describing a design using Verilog is only half the story: writing test-benches, testing a design for all its desired functions, and how identifying and removing the faults remain significant challenges. <i>Design Through Verilog HDL</i> addresses each of these issues concisely and effectively. The authors discuss constructs through illustrative examples that are tested with popular simulation packages, ensuring the subject matter remains practically relevant.</p> <p>Other important topics covered include:</p> <ul> <li>Primitives</li> <li>Gate and Net delays</li> <li>Buffers</li> <li>CMOS switches</li> <li>State machine design</li> </ul> Further, the authors focus on illuminating the differences between gate level, data flow, and behavioral styles of Verilog, a critical distinction for designers. The book’s final chapters deal with advanced topics such as timescales, parameters and related constructs, queues, and switch level design. <p>Each chapter concludes with exercises that both ensure readers have mastered the present material and stimulate readers to explore avenues of their own choosing. Written and assembled in a paced, logical manner, <i>Design Through Verilog HDL</i> provides professionals, graduate students, and advanced undergraduates with a one-of-a-kind resource.</p>